S9S08RN32W1VLCR

• 8-Bit S08 central processor unit (CPU) – Up to 20 MHz bus at 2.7 V to 5.5 V across temperature range of -40 °C to 125 °C – Supporting up to 40 interrupt/reset sources – Supporting up to four-level nested interrupt – On-chip memory – Up to 60 KB flash read/program/erase over full operating voltage and temperature – Up to 256 byte EEPROM with ECC; 2-byte erase sector; EEPROM program and erase while executing code from flash – Up to 4096 byte random-access memory (RAM) – Flash and RAM access protection • Power-saving modes – One low-power stop mode; reduced power wait mode – Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode • Clocks – Oscillator (XOSC) - loop-controlled Pierce oscillator; crystal or ceramic resonator – Internal clock source (ICS) - containing a frequencylocked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allowing 1% deviation across temperature range of 0 °C to 70 °C and -40 °C to 85 °C, 1.5% deviation across temperature range of -40 °C to 105 °C, and 2% deviation across temperature range of -40 °C to 125 °C; up to 20 MHz • System protection – Watchdog with independent clock source – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset • Development support – Single-wire background debug interface – Breakpoint capability to allow three breakpoints setting during in-circuit debugging – On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes • Peripherals – ACMP - one analog comparator with both positive and negative inputs; separately selectable interrupt on rising and falling comparator output; filtering – ADC - 16-channel, 12-bit resolution; 2.5 µs conversion time; data buffers with optional watermark; automatic compare function; internal bandgap reference channel; operation in stop mode; optional hardware trigger – CRC - programmable cyclic redundancy check module – FTM - three flex timer modulators modules including one 6-channel and two 2-channel ones; 16-bit counter; each channel can be configured for input capture, output compare, edge- or centeraligned PWM mode – IIC - One inter-integrated circuit module; up to 400 kbps; multi-master operation; programmable slave address; supporting broadcast mode and 10-bit addressing – MTIM - Two modulo timers with 8-bit prescaler and overflow interrupt – RTC - 16-bit real timer counter (RTC) – SCI - three serial communication interface (SCI/ UART) modules optional 13-bit break; full duplex non-return to zero (NRZ); LIN extension support – SPI - one 8-bit and one 16-bit serial peripheral interface (SPI) modules; full-duplex or single-wire bidirectional; master or slave mode – TSI - supporting up to 16 external electrodes; configurable software or hardware scan trigger; fully support freescale touch sensing software library; capability to wake MCU from stop3 mode 

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